YE Dong 　 WANG Jianming. DESIGN OF A 10 bit , 100 MHz SAMPLE-HOLD CIRCUIT[J]. Journal of Beijing Normal University(Natural Science), 2009, 45(2): 164-167.
Citation: YE Dong 　 WANG Jianming. DESIGN OF A 10 bit , 100 MHz SAMPLE-HOLD CIRCUIT[J]. Journal of Beijing Normal University(Natural Science), 2009, 45(2): 164-167.
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DESIGN OF A 10 bit , 100 MHz SAMPLE-HOLD CIRCUIT

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